Mega Drive Quirks
From Sonic Retro
Revision as of 00:28, 28 December 2010 by GerbilSoft (talk | contribs) (Initial list of MD hardware quirks.)
This is a list of several MD quirks that don't exactly fit in any other categories.
CLR on VDP data port
If the VDP is set to VRAM/CRAM/VSRAM Write, using the clr instruction on the VDP data port will result in a system crash: <asm>clr.w $C00000</asm> This is because the clr instruction is treated as a Read-Modify-Write instruction on the MC68000 and MC68008 CPUs. The CPU first attempts to read the value located at $C00000, but the VDP's in data write mode, so the system hangs. This was fixed in the MC68010 CPU, which does not read the address before writing 0.
Emulators that implement this quirk: Unknown
TAS instruction support
The MC68000 has an instruction, TAS (test-and-set), that is used for synchronizing multiple MC68000s in a multi-CPU system. The TAS instruction uses a different bus cycle than other instructions, and isn't supported by either the MD1 or MD2 hardware. However, the Majesco Genesis 3 does support TAS, which breaks a few games that incorrectly use the TAS instruction.
Emulators that do not implement TAS: Probably all. Emulators that do implement TAS: Unknown